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Valeriu

Valeriu

I graduated in 1980 from the Computer Science & Engineering Department of the University “Politehnica” of Bucharest (Romania) with a MSc thesis on high-speed graphic workstations (Best MSc Thesis Award). I researched, designed and developed ultra high-speed floating-point units (FPUs) and central processing units (CPUs) for two years while with the Research Institute for Computer Techniques, Bucharest (Romania). Returning to the University “Politehnica” of Bucharest, I became Assistant Professor (1983), Senior Lecturer (1990), and Associate Professor (1995), teaching, researching (computer architecture, VLSI design, digital circuits, artificial neural networks), and supervising (29 MSc theses).

In 1991, being awarded both a Fulbright Research Fellowship (USA) and a PhD Scholarship (Belgium), I went for the doctoral studies, and have been on leave of absence from the University “Politehnica” of Bucharest (till 2001).
11/1991 – 11/1994 • PhD candidate with the Electrical Engineering Department, Katholieke Universiteit Leuven (Belgium), where in May 1994 I earned my PhD summa cum laude (highest honors) for a thesis on area- and time-efficient VLSI implementations of artificial neural networks using threshold logic gates.
12/1994 – 09/1996 • Human Capital and Mobility Individual Research Fellow of the European Union with the Centre for Neural Networks, King’s College London (UK), conducting research on programmable neural arrays.
10/1996 – 08/1998 • Director’s Postdoctoral Fellow with the Space and Atmospheric Sciences Division, Los Alamos National Laboratory (USA), investigating adaptive/reconfigurable field programmable neural arrays for deployable adaptive processing systems.
09/1998 – 05/2001 • CTO and co-founder of RN2R LLC and Fellow of Rose Research (Dallas, USA), coordinating research on ultra-fast low-power VLSI enabling neural-inspired gates and circuits.

From June 2001 I became an Associate Professor with the School of Electrical Engineering & Computer Science, Washington State University, involved in teaching (advanced VLSI/nanoelectronics, ASICs/FPGAs, neural computations, computer architecture), researching (low-power and highly reliable VLSI circuits, emerging biological-inspired nano-architectures), and supervising (1 PhD and 2 MSc theses). In March 2005 I was offered a visiting professor position with the School of Intelligent Systems, University of Ulster (Londonderry, UK), and in July 2005 I joined the College of Information Technology (CIT), United Arab Emirates University (UAEU, Al Ain, UAE) as Chair of Computer Engineering (2005–2006), where in 2006 I was promoted to Associate Dean for Research & Graduate Studies (2006–2011). Since August 2015 I joined “Aurel Vlaicu” University of Arad (UAV, Arad, Romania), while still working on some research topics with UAEU.

"Aurel Vlaicu" University of Arad, Arad, .

E-mail: trimite un mesaj.

Pagina web a instituţiei: http://www.uav.ro/

Urmareste linkul ResearcherID pentru toate articolele cercetatorului: F-7799-2015. Tabelul detaliat al articolelor este in josul paginii.

Nascut(a) in:

Interese: Nano-arhitecturi de inspiratie bio/neuo (fiabile & de putere scazuta)

flag Details:
I am/was PI or co-PI on 44 grants/contracts, and PI on 93 short-term travel grants totaling over 51 M$. The research results have been published or accepted for publication: 2 books (3 more in progress), 8 book chapters (7 invited, and 5 more in progress), 11 patents (1 more in progress), 28 journal papers (2 invited, and 5 more in progress), and 189 conference papers (26 invited and 6 best paper awards); presented over 370 times (out of which 190 invited keynote/tutorials/presentations); and cited 1282 times (excluding self-citations).

I have been a reviewer for the National Science Foundation (USA), the European Commission (EU), as well as for the science foundations of Belgium, Cyprus, Romania, Switzerland, UAE, as well as for many journals and conferences. I was an Associate Editor of the IEEE Transactions on Neural Networks (2005–2008) and of the IEEE Transactions on VLSI Systems (2011–2015), and I am an Associate Editor of the Nano Communication Networks (since 2010). I have contributed to organizing over 110 international conferences and 10 invited workshops/sessions, chaired over 50 conference sessions, and I am a Senior Member of the IEEE since 1996 (in 1997 I was the Program Chairman of the IEEE Los Alamos Section), a founding member of the European Neural Network Society (ENNS), and a member of: the Association for Computing Machinery (ACM), the International Neural Network Society (INNS), the EU Marie Curie Fellowship Association (MCFA), and the American Nano Society (ANS). Additionally, I am a member of the SRC-NNI Working Group on Novel Nano-architectures (since 2003), the IEEE CS Task Force on Nano-architectures (since 2005), and the IEEE Emerging Technologies Group on Nanoscale Communications (since 2010).